Work experience
20 years+ experience in:
• up to 90 nm CMOS
• Imaging
• Non Volatile Memories NVM
• BCDmos LDMOS(120V) + RF + MEMS
• Qualification / Yield improvement / Transfer
• EU - projects
90nm CMOS
1997-1999: Philips Nijmegen, Silicon material analysis to detect and reduce contamination in wafers during processing.
1999-2003: Philips Crolles, device and process engineering in 90nm CMOS technology development on 300mm wafers. In this technology GIDL, DIBL, gate leakage etc appeared to be new important parameters. Characterizing these parameters was needed to feedback for technology development. At the same time process improvements for isolation, Latch-up and ESD were put in place.
2010-2011: LFoundry Rousset, group leader 110nm CMOS development. This process included embedded NVM flash, PDK set-up, basic library development, MPW (multi project wafer) service, test etc. This technology is a base line for customer specific technology options in a foundry service.
Imaging
1990-1997: Philips Eindhoven, CCD group. In this time I was working on leakage current mechanisms "dark current" as fixed pattern noise, white pixels, blinking while pixels. Fundamental physics was developed to gain more knowledge of the physical mechanisms. This work leaded to a my Thesis (see publication list).
2003-2004: Philips Nijmegen/Eindhoven, CMOS imaging group. Project leader in process and pixel design development in a CMOS imaging process for consumer applications. Responsible of total package from pixel design, technology development in a 0.15CMOS base line to characterization and optimization.
2010-2012: LFoundry Landshut, Project leader image sensors for professional applications. I designed a backside illumination CMOS process including pixel layout. This was completely tailored for different professional imaging applications. A French funding project was build "ICARE" to group the different experts and customers to build, characterize and demonstrate this technology.
Non Volatile Memories NVM
2004-2009: Atmel Rousset. Project leader of embedded EE NVM 0.15 micron process development. Process and devices were developed for smartcards, micro-controllers, RF radio chips etc.
2009-2010: Atmel Rousset. Single poly memory in standard 0.15 micron CMOS process development.
2010: Lfoundry Rousset. Project leader of Single poly memeory cell design/process development embedded in 110nm CMOS baseline process. Full cell definition with sizes of 2 micron square/cell were realized.
2010: Lfoundry Rousset. SST 90nm embedded NVM flash cell transfer/installation to Rousset fab. Flash cell was developed by SST, and on license agreement installed in Rousset.
BCDmos LDMOS(120V) + RF + MEMS
2009-2010: Atmel Rousset. Project leader of BCDmos process development for automotive products. Single poly NVM cell, LDmos (120V) and RF devices were put in place on SOI substrate. Process was made for battery management, communication protocols circuits and other automotive applications.
2011: Lfoundry Rousset. High density RF module development as MIM cap's, Inductors, Resistors etc. Devices were needed for passive IC in combination with RF MEMS switches.
Qualification / Yield improvement / Transfer
During all process developments, qualification and yield improvement are constantly subjects of attention. The qualification is devided in multiple evaluations along the development while choices for process improvement will have clear impact on yield. In some cases a transfer was in play.